PBudmark There is a major design flaw in this module, as noted a while ago in the forum for 3pcs, quote:The problem with the 3.3V line at 4.2 is due to the RST input being tied not to 3.3 V out but to the Vbus in (5V) this back feeds into the 3.3V line pulling it up above spec, cut the trace you see coming from pin 9 before it reaches the capacitor, then optionally pull it to 3.3 via a 4k7 resistor to pin 6. This also seems to solve the variability with Win10Posted 2017-02-22 09:12:56 by instoned@aol.c
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